FC2カウンター FPGAの部屋 フリーの高位合成ツール Synverll を試してみる1

FPGAやCPLDの話題やFPGA用のツールの話題などです。 マニアックです。 日記も書きます。

FPGAの部屋

FPGAの部屋の有用と思われるコンテンツのまとめサイトを作りました。Xilinx ISEの初心者の方には、FPGAリテラシーおよびチュートリアルのページをお勧めいたします。

フリーの高位合成ツール Synverll を試してみる1

FPGAマガジン No.1195 ページからに載っている石原ひでみさんの書いたC言語による高位合成ツールのSynverll を試してみることにした。

Synvell はGoogle で検索してもわかるがGitHub に公開されている

私のVirtualBox 上にインストールしたUbuntu のバージョンは 14.04 なので、apt-get コマンドでは LLVM 3.4 がインストールされる。そこで、FPGAマガジン No.11 で書かれた手順でLLVM 3.6 のソースコードからインストールを行って、夜からやって朝までコンパイルに時間がかかったが、無事に終了した。

Synvell のGitHub から git clone を行った。

次に、FPGAマガジン No.11 で書かれた手順で Synverll 自体をコンパイルした。

これで、Synverll が使えるようになった。

synverll ディレクトリの example ディレクトリに marsee_example1 ディレクトリを作製した。

marsee_example1 ディレクトリの下に、marsee_example1.c を作製した。
Synverll_1_151102.png

marsee_example1.c を下に示す。(2015/11/03:修正)
// marsee_example1.c
// 掛け算サンプル
//
#define ARRAY_LIMIT 10
int marsee_example1(int multi_in0[ARRAY_LIMIT], int multi_in1[ARRAY_LIMIT], int multi_out[ARRAY_LIMIT]){
int i;
for (i=0; i<ARRAY_LIMIT; i++){
multi_out[i] = multi_in0[i] * multi_in1[i];
}
return 0;
}
これを、 marsee_example1 ディレクトリ上で ../../synverll marsee_example1.c mar_ex_top コマンドでC言語からの高位合成を行った。
mar_ex_top.v と memory_map.txt 、mar_ex_top.v が生成された。
Synverll_2_151102.png

mar_ex_top.v を下に示す。
/*
 * Copyright (C)2005-2015 AQUAXIS TECHNOLOGY.
 *  Don't remove this header.
 * When you use this source, there is a need to inherit this header.
 *
 * This software is released under the MIT License.
 * http://opensource.org/licenses/mit-license.php
 *
 * For further information please contact.
 *  URI:    http://www.aquaxis.com/
 *  E-Mail: info(at)aquaxis.com
 */
module mar_ex_top(
input system_clock,
input system_reset,
input __func_start,
output __func_done,
output __func_ready,
output __gm_req,
output __gm_rnw,
input __gm_done,
output [31:0] __gm_adrs,
output [1:0] __gm_leng,
input [31:0] __gm_di,
output [31:0] __gm_do,
// global signal
input __args_multi_in0,
input __args_multi_in1,
input __args_multi_out,
output dummy
);
// wire
wire marsee_example1__func_start;
wire marsee_example1__func_done;
wire marsee_example1__func_ready;
wire marsee_example1__gm_req;
wire marsee_example1__gm_rnw;
wire marsee_example1__gm_done;
wire [31:0] marsee_example1__gm_adrs;
wire [1:0] marsee_example1__gm_leng;
wire [31:0] marsee_example1__gm_di;
wire [31:0] marsee_example1__gm_do;
wire marsee_example1__args_multi_in0;
wire marsee_example1__args_multi_in1;
wire marsee_example1__args_multi_out;
// connection
assign marsee_example1__gm_done = __gm_done;
assign marsee_example1__gm_di = __gm_di;
// Global Memory
assign __gm_req =  marsee_example1__gm_req ;
assign __gm_adrs =  marsee_example1__gm_adrs ;
assign __gm_rnw =  marsee_example1__gm_rnw ;
assign __gm_do =  marsee_example1__gm_do ;
assign __gm_leng =  marsee_example1__gm_leng ;
// system signal
assign marsee_example1__func_start = __func_start;
assign __func_done = marsee_example1__func_done;
assign __func_ready = marsee_example1__func_ready;
assign marsee_example1__args_multi_in0 = __args_multi_in0;
assign marsee_example1__args_multi_in1 = __args_multi_in1;
assign marsee_example1__args_multi_out = __args_multi_out;
// modules
marsee_example1 u_marsee_example1(
// system signals
.__func_clock(system_clock),
.__func_reset(system_reset),
.__func_start(marsee_example1__func_start),
.__func_done(marsee_example1__func_done),
.__func_ready(marsee_example1__func_ready),
// memory bus
.__gm_req(marsee_example1__gm_req),
.__gm_rnw(marsee_example1__gm_rnw),
.__gm_done(marsee_example1__gm_done),
.__gm_adrs(marsee_example1__gm_adrs),
.__gm_leng(marsee_example1__gm_leng),
.__gm_di(marsee_example1__gm_di),
.__gm_do(marsee_example1__gm_do),
// base address
// arguments
.__args_multi_in0(marsee_example1__args_multi_in0),
.__args_multi_in1(marsee_example1__args_multi_in1),
.__args_multi_out(marsee_example1__args_multi_out),
// call instruction
.__dummy()
);
endmodule

marsee_example1.v を下に示す。
/*
 * Copyright (C)2005-2015 AQUAXIS TECHNOLOGY.
 *  Don't remove this header.
 * When you use this source, there is a need to inherit this header.
 *
 * This software is released under the MIT License.
 * http://opensource.org/licenses/mit-license.php
 *
 * For further information please contact.
 *  URI:    http://www.aquaxis.com/
 *  E-Mail: info(at)aquaxis.com
 */
module marsee_example1(
input __func_clock,
input __func_reset,
input __func_start,
output reg __func_done,
output reg __func_ready,
output reg __gm_req,
output reg __gm_rnw,
input __gm_done,
output reg [31:0] __gm_adrs,
output reg [1:0] __gm_leng,
input [31:0] __gm_di,
output reg [31:0] __gm_do,
// Memory Singal
input [31:0] __args_multi_in0,
input [31:0] __args_multi_in1,
input [31:0] __args_multi_out,
// Call Singal
output reg __dummy
);
reg [31:0] __sig_0;
reg [31:0] __sig_1;
reg [31:0] __sig_mul;
wire [31:0] __sig_arrayidx_1;
reg [31:0] __sig_2;
wire [31:0] __sig_arrayidx1_1;
reg [31:0] __sig_3;
reg [31:0] __sig_mul_1;
wire [31:0] __sig_arrayidx2_1;
wire [31:0] __sig_arrayidx_2;
reg [31:0] __sig_4;
wire [31:0] __sig_arrayidx1_2;
reg [31:0] __sig_5;
reg [31:0] __sig_mul_2;
wire [31:0] __sig_arrayidx2_2;
wire [31:0] __sig_arrayidx_3;
reg [31:0] __sig_6;
wire [31:0] __sig_arrayidx1_3;
reg [31:0] __sig_7;
reg [31:0] __sig_mul_3;
wire [31:0] __sig_arrayidx2_3;
wire [31:0] __sig_arrayidx_4;
reg [31:0] __sig_8;
wire [31:0] __sig_arrayidx1_4;
reg [31:0] __sig_9;
reg [31:0] __sig_mul_4;
wire [31:0] __sig_arrayidx2_4;
wire [31:0] __sig_arrayidx_5;
reg [31:0] __sig_10;
wire [31:0] __sig_arrayidx1_5;
reg [31:0] __sig_11;
reg [31:0] __sig_mul_5;
wire [31:0] __sig_arrayidx2_5;
wire [31:0] __sig_arrayidx_6;
reg [31:0] __sig_12;
wire [31:0] __sig_arrayidx1_6;
reg [31:0] __sig_13;
reg [31:0] __sig_mul_6;
wire [31:0] __sig_arrayidx2_6;
wire [31:0] __sig_arrayidx_7;
reg [31:0] __sig_14;
wire [31:0] __sig_arrayidx1_7;
reg [31:0] __sig_15;
reg [31:0] __sig_mul_7;
wire [31:0] __sig_arrayidx2_7;
wire [31:0] __sig_arrayidx_8;
reg [31:0] __sig_16;
wire [31:0] __sig_arrayidx1_8;
reg [31:0] __sig_17;
reg [31:0] __sig_mul_8;
wire [31:0] __sig_arrayidx2_8;
wire [31:0] __sig_arrayidx_9;
reg [31:0] __sig_18;
wire [31:0] __sig_arrayidx1_9;
reg [31:0] __sig_19;
reg [31:0] __sig_mul_9;
wire [31:0] __sig_arrayidx2_9;
assign __sig_arrayidx_1 = (__sig_multi_in0 + (1));
assign __sig_arrayidx1_1 = (__sig_multi_in1 + (1));
assign __sig_arrayidx2_1 = (__sig_multi_out + (1));
assign __sig_arrayidx_2 = (__sig_multi_in0 + (2));
assign __sig_arrayidx1_2 = (__sig_multi_in1 + (2));
assign __sig_arrayidx2_2 = (__sig_multi_out + (2));
assign __sig_arrayidx_3 = (__sig_multi_in0 + (3));
assign __sig_arrayidx1_3 = (__sig_multi_in1 + (3));
assign __sig_arrayidx2_3 = (__sig_multi_out + (3));
assign __sig_arrayidx_4 = (__sig_multi_in0 + (4));
assign __sig_arrayidx1_4 = (__sig_multi_in1 + (4));
assign __sig_arrayidx2_4 = (__sig_multi_out + (4));
assign __sig_arrayidx_5 = (__sig_multi_in0 + (5));
assign __sig_arrayidx1_5 = (__sig_multi_in1 + (5));
assign __sig_arrayidx2_5 = (__sig_multi_out + (5));
assign __sig_arrayidx_6 = (__sig_multi_in0 + (6));
assign __sig_arrayidx1_6 = (__sig_multi_in1 + (6));
assign __sig_arrayidx2_6 = (__sig_multi_out + (6));
assign __sig_arrayidx_7 = (__sig_multi_in0 + (7));
assign __sig_arrayidx1_7 = (__sig_multi_in1 + (7));
assign __sig_arrayidx2_7 = (__sig_multi_out + (7));
assign __sig_arrayidx_8 = (__sig_multi_in0 + (8));
assign __sig_arrayidx1_8 = (__sig_multi_in1 + (8));
assign __sig_arrayidx2_8 = (__sig_multi_out + (8));
assign __sig_arrayidx_9 = (__sig_multi_in0 + (9));
assign __sig_arrayidx1_9 = (__sig_multi_in1 + (9));
assign __sig_arrayidx2_9 = (__sig_multi_out + (9));
reg [31:0] __sig_multi_in0;
reg [31:0] __sig_multi_in1;
reg [31:0] __sig_multi_out;
localparam __state_fin_exec = 0;
localparam __state_start_req = 1;
localparam __state_start_wait = 2;
localparam __state_start_exec = 3;
localparam __state_1_exec = 4;
localparam __state_2_exec = 5;
localparam __state_3_req = 6;
localparam __state_3_wait = 7;
localparam __state_3_exec = 8;
localparam __state_4_req = 9;
localparam __state_4_wait = 10;
localparam __state_4_exec = 11;
localparam __state_5_exec = 12;
localparam __state_6_req = 13;
localparam __state_6_wait = 14;
localparam __state_6_exec = 15;
localparam __state_7_req = 16;
localparam __state_7_wait = 17;
localparam __state_7_exec = 18;
localparam __state_8_req = 19;
localparam __state_8_wait = 20;
localparam __state_8_exec = 21;
localparam __state_9_exec = 22;
localparam __state_10_req = 23;
localparam __state_10_wait = 24;
localparam __state_10_exec = 25;
localparam __state_11_req = 26;
localparam __state_11_wait = 27;
localparam __state_11_exec = 28;
localparam __state_12_req = 29;
localparam __state_12_wait = 30;
localparam __state_12_exec = 31;
localparam __state_13_exec = 32;
localparam __state_14_req = 33;
localparam __state_14_wait = 34;
localparam __state_14_exec = 35;
localparam __state_15_req = 36;
localparam __state_15_wait = 37;
localparam __state_15_exec = 38;
localparam __state_16_req = 39;
localparam __state_16_wait = 40;
localparam __state_16_exec = 41;
localparam __state_17_exec = 42;
localparam __state_18_req = 43;
localparam __state_18_wait = 44;
localparam __state_18_exec = 45;
localparam __state_19_req = 46;
localparam __state_19_wait = 47;
localparam __state_19_exec = 48;
localparam __state_20_req = 49;
localparam __state_20_wait = 50;
localparam __state_20_exec = 51;
localparam __state_21_exec = 52;
localparam __state_22_req = 53;
localparam __state_22_wait = 54;
localparam __state_22_exec = 55;
localparam __state_23_req = 56;
localparam __state_23_wait = 57;
localparam __state_23_exec = 58;
localparam __state_24_req = 59;
localparam __state_24_wait = 60;
localparam __state_24_exec = 61;
localparam __state_25_exec = 62;
localparam __state_26_req = 63;
localparam __state_26_wait = 64;
localparam __state_26_exec = 65;
localparam __state_27_req = 66;
localparam __state_27_wait = 67;
localparam __state_27_exec = 68;
localparam __state_28_req = 69;
localparam __state_28_wait = 70;
localparam __state_28_exec = 71;
localparam __state_29_exec = 72;
localparam __state_30_req = 73;
localparam __state_30_wait = 74;
localparam __state_30_exec = 75;
localparam __state_31_req = 76;
localparam __state_31_wait = 77;
localparam __state_31_exec = 78;
localparam __state_32_req = 79;
localparam __state_32_wait = 80;
localparam __state_32_exec = 81;
localparam __state_33_exec = 82;
localparam __state_34_req = 83;
localparam __state_34_wait = 84;
localparam __state_34_exec = 85;
localparam __state_35_req = 86;
localparam __state_35_wait = 87;
localparam __state_35_exec = 88;
localparam __state_36_req = 89;
localparam __state_36_wait = 90;
localparam __state_36_exec = 91;
localparam __state_37_exec = 92;
localparam __state_38_req = 93;
localparam __state_38_wait = 94;
localparam __state_38_exec = 95;
localparam __state_39_req = 96;
localparam __state_39_wait = 97;
localparam __state_39_exec = 98;
localparam __state_40_req = 99;
localparam __state_40_wait = 100;
localparam __state_40_exec = 101;
localparam __state_41_exec = 102;
localparam __state_42_req = 103;
localparam __state_42_wait = 104;
localparam __state_42_exec = 105;
localparam __state_43_exec = 106;
localparam __state_44_exec = 107;
integer __state;
localparam __label_0 = 0;
localparam __label_entry = 2;
integer __label;
always @(posedge __func_clock or negedge __func_reset) begin
if(!__func_reset) begin
__state <= __state_start_req;
__func_ready <= 0;
__func_done <= 0;
end else begin
case(__state)
__state_start_req: begin
__state <= __state_start_wait;
end
__state_start_wait: begin
if(__func_start) begin
__state <= __state_start_exec;
__func_ready <= 0;
__func_done <= 0;
__sig_multi_in0 <= __args_multi_in0;
__sig_multi_in1 <= __args_multi_in1;
__sig_multi_out <= __args_multi_out;
end
end
__state_start_exec: begin
__state <= __state_1_exec;
end
__state_1_exec: begin
__state <= __state_2_exec;
end
__state_2_exec: begin
__state <= __state_3_req;
__label <= __label_entry;
end
__state_3_req: begin
__state <= __state_3_wait;
__gm_req <= 1;
__gm_rnw <= 1;
__gm_adrs <= (__sig_multi_in0);
__gm_leng <= 3;
end
__state_3_wait: begin
if((__gm_done == 1)) begin
__state <= __state_3_exec;
end
__gm_req <= 0;
end
__state_3_exec: begin
__state <= __state_4_req;
__sig_0 <= __gm_di;
end
__state_4_req: begin
__state <= __state_4_wait;
__gm_req <= 1;
__gm_rnw <= 1;
__gm_adrs <= (__sig_multi_in1);
__gm_leng <= 3;
end
__state_4_wait: begin
if((__gm_done == 1)) begin
__state <= __state_4_exec;
end
__gm_req <= 0;
end
__state_4_exec: begin
__state <= __state_5_exec;
__sig_1 <= __gm_di;
end
__state_5_exec: begin
__state <= __state_6_req;
__sig_mul <= __sig_1 * __sig_0;
end
__state_6_req: begin
__state <= __state_6_wait;
__gm_req <= 1;
__gm_rnw <= 0;
__gm_adrs <= (__sig_multi_out);
__gm_leng <= 3;
__gm_do <= __sig_mul;
end
__state_6_wait: begin
if((__gm_done == 1)) begin
__state <= __state_6_exec;
end
__gm_req <= 0;
end
__state_6_exec: begin
__state <= __state_7_req;
end
__state_7_req: begin
__state <= __state_7_wait;
__gm_req <= 1;
__gm_rnw <= 1;
__gm_adrs <= (__sig_arrayidx_1);
__gm_leng <= 3;
end
__state_7_wait: begin
if((__gm_done == 1)) begin
__state <= __state_7_exec;
end
__gm_req <= 0;
end
__state_7_exec: begin
__state <= __state_8_req;
__sig_2 <= __gm_di;
end
__state_8_req: begin
__state <= __state_8_wait;
__gm_req <= 1;
__gm_rnw <= 1;
__gm_adrs <= (__sig_arrayidx1_1);
__gm_leng <= 3;
end
__state_8_wait: begin
if((__gm_done == 1)) begin
__state <= __state_8_exec;
end
__gm_req <= 0;
end
__state_8_exec: begin
__state <= __state_9_exec;
__sig_3 <= __gm_di;
end
__state_9_exec: begin
__state <= __state_10_req;
__sig_mul_1 <= __sig_3 * __sig_2;
end
__state_10_req: begin
__state <= __state_10_wait;
__gm_req <= 1;
__gm_rnw <= 0;
__gm_adrs <= (__sig_arrayidx2_1);
__gm_leng <= 3;
__gm_do <= __sig_mul_1;
end
__state_10_wait: begin
if((__gm_done == 1)) begin
__state <= __state_10_exec;
end
__gm_req <= 0;
end
__state_10_exec: begin
__state <= __state_11_req;
end
__state_11_req: begin
__state <= __state_11_wait;
__gm_req <= 1;
__gm_rnw <= 1;
__gm_adrs <= (__sig_arrayidx_2);
__gm_leng <= 3;
end
__state_11_wait: begin
if((__gm_done == 1)) begin
__state <= __state_11_exec;
end
__gm_req <= 0;
end
__state_11_exec: begin
__state <= __state_12_req;
__sig_4 <= __gm_di;
end
__state_12_req: begin
__state <= __state_12_wait;
__gm_req <= 1;
__gm_rnw <= 1;
__gm_adrs <= (__sig_arrayidx1_2);
__gm_leng <= 3;
end
__state_12_wait: begin
if((__gm_done == 1)) begin
__state <= __state_12_exec;
end
__gm_req <= 0;
end
__state_12_exec: begin
__state <= __state_13_exec;
__sig_5 <= __gm_di;
end
__state_13_exec: begin
__state <= __state_14_req;
__sig_mul_2 <= __sig_5 * __sig_4;
end
__state_14_req: begin
__state <= __state_14_wait;
__gm_req <= 1;
__gm_rnw <= 0;
__gm_adrs <= (__sig_arrayidx2_2);
__gm_leng <= 3;
__gm_do <= __sig_mul_2;
end
__state_14_wait: begin
if((__gm_done == 1)) begin
__state <= __state_14_exec;
end
__gm_req <= 0;
end
__state_14_exec: begin
__state <= __state_15_req;
end
__state_15_req: begin
__state <= __state_15_wait;
__gm_req <= 1;
__gm_rnw <= 1;
__gm_adrs <= (__sig_arrayidx_3);
__gm_leng <= 3;
end
__state_15_wait: begin
if((__gm_done == 1)) begin
__state <= __state_15_exec;
end
__gm_req <= 0;
end
__state_15_exec: begin
__state <= __state_16_req;
__sig_6 <= __gm_di;
end
__state_16_req: begin
__state <= __state_16_wait;
__gm_req <= 1;
__gm_rnw <= 1;
__gm_adrs <= (__sig_arrayidx1_3);
__gm_leng <= 3;
end
__state_16_wait: begin
if((__gm_done == 1)) begin
__state <= __state_16_exec;
end
__gm_req <= 0;
end
__state_16_exec: begin
__state <= __state_17_exec;
__sig_7 <= __gm_di;
end
__state_17_exec: begin
__state <= __state_18_req;
__sig_mul_3 <= __sig_7 * __sig_6;
end
__state_18_req: begin
__state <= __state_18_wait;
__gm_req <= 1;
__gm_rnw <= 0;
__gm_adrs <= (__sig_arrayidx2_3);
__gm_leng <= 3;
__gm_do <= __sig_mul_3;
end
__state_18_wait: begin
if((__gm_done == 1)) begin
__state <= __state_18_exec;
end
__gm_req <= 0;
end
__state_18_exec: begin
__state <= __state_19_req;
end
__state_19_req: begin
__state <= __state_19_wait;
__gm_req <= 1;
__gm_rnw <= 1;
__gm_adrs <= (__sig_arrayidx_4);
__gm_leng <= 3;
end
__state_19_wait: begin
if((__gm_done == 1)) begin
__state <= __state_19_exec;
end
__gm_req <= 0;
end
__state_19_exec: begin
__state <= __state_20_req;
__sig_8 <= __gm_di;
end
__state_20_req: begin
__state <= __state_20_wait;
__gm_req <= 1;
__gm_rnw <= 1;
__gm_adrs <= (__sig_arrayidx1_4);
__gm_leng <= 3;
end
__state_20_wait: begin
if((__gm_done == 1)) begin
__state <= __state_20_exec;
end
__gm_req <= 0;
end
__state_20_exec: begin
__state <= __state_21_exec;
__sig_9 <= __gm_di;
end
__state_21_exec: begin
__state <= __state_22_req;
__sig_mul_4 <= __sig_9 * __sig_8;
end
__state_22_req: begin
__state <= __state_22_wait;
__gm_req <= 1;
__gm_rnw <= 0;
__gm_adrs <= (__sig_arrayidx2_4);
__gm_leng <= 3;
__gm_do <= __sig_mul_4;
end
__state_22_wait: begin
if((__gm_done == 1)) begin
__state <= __state_22_exec;
end
__gm_req <= 0;
end
__state_22_exec: begin
__state <= __state_23_req;
end
__state_23_req: begin
__state <= __state_23_wait;
__gm_req <= 1;
__gm_rnw <= 1;
__gm_adrs <= (__sig_arrayidx_5);
__gm_leng <= 3;
end
__state_23_wait: begin
if((__gm_done == 1)) begin
__state <= __state_23_exec;
end
__gm_req <= 0;
end
__state_23_exec: begin
__state <= __state_24_req;
__sig_10 <= __gm_di;
end
__state_24_req: begin
__state <= __state_24_wait;
__gm_req <= 1;
__gm_rnw <= 1;
__gm_adrs <= (__sig_arrayidx1_5);
__gm_leng <= 3;
end
__state_24_wait: begin
if((__gm_done == 1)) begin
__state <= __state_24_exec;
end
__gm_req <= 0;
end
__state_24_exec: begin
__state <= __state_25_exec;
__sig_11 <= __gm_di;
end
__state_25_exec: begin
__state <= __state_26_req;
__sig_mul_5 <= __sig_11 * __sig_10;
end
__state_26_req: begin
__state <= __state_26_wait;
__gm_req <= 1;
__gm_rnw <= 0;
__gm_adrs <= (__sig_arrayidx2_5);
__gm_leng <= 3;
__gm_do <= __sig_mul_5;
end
__state_26_wait: begin
if((__gm_done == 1)) begin
__state <= __state_26_exec;
end
__gm_req <= 0;
end
__state_26_exec: begin
__state <= __state_27_req;
end
__state_27_req: begin
__state <= __state_27_wait;
__gm_req <= 1;
__gm_rnw <= 1;
__gm_adrs <= (__sig_arrayidx_6);
__gm_leng <= 3;
end
__state_27_wait: begin
if((__gm_done == 1)) begin
__state <= __state_27_exec;
end
__gm_req <= 0;
end
__state_27_exec: begin
__state <= __state_28_req;
__sig_12 <= __gm_di;
end
__state_28_req: begin
__state <= __state_28_wait;
__gm_req <= 1;
__gm_rnw <= 1;
__gm_adrs <= (__sig_arrayidx1_6);
__gm_leng <= 3;
end
__state_28_wait: begin
if((__gm_done == 1)) begin
__state <= __state_28_exec;
end
__gm_req <= 0;
end
__state_28_exec: begin
__state <= __state_29_exec;
__sig_13 <= __gm_di;
end
__state_29_exec: begin
__state <= __state_30_req;
__sig_mul_6 <= __sig_13 * __sig_12;
end
__state_30_req: begin
__state <= __state_30_wait;
__gm_req <= 1;
__gm_rnw <= 0;
__gm_adrs <= (__sig_arrayidx2_6);
__gm_leng <= 3;
__gm_do <= __sig_mul_6;
end
__state_30_wait: begin
if((__gm_done == 1)) begin
__state <= __state_30_exec;
end
__gm_req <= 0;
end
__state_30_exec: begin
__state <= __state_31_req;
end
__state_31_req: begin
__state <= __state_31_wait;
__gm_req <= 1;
__gm_rnw <= 1;
__gm_adrs <= (__sig_arrayidx_7);
__gm_leng <= 3;
end
__state_31_wait: begin
if((__gm_done == 1)) begin
__state <= __state_31_exec;
end
__gm_req <= 0;
end
__state_31_exec: begin
__state <= __state_32_req;
__sig_14 <= __gm_di;
end
__state_32_req: begin
__state <= __state_32_wait;
__gm_req <= 1;
__gm_rnw <= 1;
__gm_adrs <= (__sig_arrayidx1_7);
__gm_leng <= 3;
end
__state_32_wait: begin
if((__gm_done == 1)) begin
__state <= __state_32_exec;
end
__gm_req <= 0;
end
__state_32_exec: begin
__state <= __state_33_exec;
__sig_15 <= __gm_di;
end
__state_33_exec: begin
__state <= __state_34_req;
__sig_mul_7 <= __sig_15 * __sig_14;
end
__state_34_req: begin
__state <= __state_34_wait;
__gm_req <= 1;
__gm_rnw <= 0;
__gm_adrs <= (__sig_arrayidx2_7);
__gm_leng <= 3;
__gm_do <= __sig_mul_7;
end
__state_34_wait: begin
if((__gm_done == 1)) begin
__state <= __state_34_exec;
end
__gm_req <= 0;
end
__state_34_exec: begin
__state <= __state_35_req;
end
__state_35_req: begin
__state <= __state_35_wait;
__gm_req <= 1;
__gm_rnw <= 1;
__gm_adrs <= (__sig_arrayidx_8);
__gm_leng <= 3;
end
__state_35_wait: begin
if((__gm_done == 1)) begin
__state <= __state_35_exec;
end
__gm_req <= 0;
end
__state_35_exec: begin
__state <= __state_36_req;
__sig_16 <= __gm_di;
end
__state_36_req: begin
__state <= __state_36_wait;
__gm_req <= 1;
__gm_rnw <= 1;
__gm_adrs <= (__sig_arrayidx1_8);
__gm_leng <= 3;
end
__state_36_wait: begin
if((__gm_done == 1)) begin
__state <= __state_36_exec;
end
__gm_req <= 0;
end
__state_36_exec: begin
__state <= __state_37_exec;
__sig_17 <= __gm_di;
end
__state_37_exec: begin
__state <= __state_38_req;
__sig_mul_8 <= __sig_17 * __sig_16;
end
__state_38_req: begin
__state <= __state_38_wait;
__gm_req <= 1;
__gm_rnw <= 0;
__gm_adrs <= (__sig_arrayidx2_8);
__gm_leng <= 3;
__gm_do <= __sig_mul_8;
end
__state_38_wait: begin
if((__gm_done == 1)) begin
__state <= __state_38_exec;
end
__gm_req <= 0;
end
__state_38_exec: begin
__state <= __state_39_req;
end
__state_39_req: begin
__state <= __state_39_wait;
__gm_req <= 1;
__gm_rnw <= 1;
__gm_adrs <= (__sig_arrayidx_9);
__gm_leng <= 3;
end
__state_39_wait: begin
if((__gm_done == 1)) begin
__state <= __state_39_exec;
end
__gm_req <= 0;
end
__state_39_exec: begin
__state <= __state_40_req;
__sig_18 <= __gm_di;
end
__state_40_req: begin
__state <= __state_40_wait;
__gm_req <= 1;
__gm_rnw <= 1;
__gm_adrs <= (__sig_arrayidx1_9);
__gm_leng <= 3;
end
__state_40_wait: begin
if((__gm_done == 1)) begin
__state <= __state_40_exec;
end
__gm_req <= 0;
end
__state_40_exec: begin
__state <= __state_41_exec;
__sig_19 <= __gm_di;
end
__state_41_exec: begin
__state <= __state_42_req;
__sig_mul_9 <= __sig_19 * __sig_18;
end
__state_42_req: begin
__state <= __state_42_wait;
__gm_req <= 1;
__gm_rnw <= 0;
__gm_adrs <= (__sig_arrayidx2_9);
__gm_leng <= 3;
__gm_do <= __sig_mul_9;
end
__state_42_wait: begin
if((__gm_done == 1)) begin
__state <= __state_42_exec;
end
__gm_req <= 0;
end
__state_42_exec: begin
__state <= __state_43_exec;
end
__state_43_exec: begin
__state <= __state_fin_exec;
end
__state_44_exec: begin
__state <= __state_fin_exec;
end
__state_fin_exec: begin
__state <= __state_start_req;
__func_ready <= 1;
__func_done <= 1;
end
endcase
end
end
endmodule
  1. 2015年11月02日 04:25 |
  2. Synverll
  3. | トラックバック:0
  4. | コメント:0

コメント

コメントの投稿


管理者にだけ表示を許可する

トラックバック URL
http://marsee101.blog19.fc2.com/tb.php/3297-bd108bc3
この記事にトラックバックする(FC2ブログユーザー)