FC2カウンター FPGAの部屋 SDSoC 2016.2 でラプラシアンフィルタをテスト2

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FPGAの部屋

FPGAの部屋の有用と思われるコンテンツのまとめサイトを作りました。Xilinx ISEの初心者の方には、FPGAリテラシーおよびチュートリアルのページをお勧めいたします。

SDSoC 2016.2 でラプラシアンフィルタをテスト2

SDSoC 2016.2 でラプラシアンフィルタをテスト1”の続き。

前回は、SDSoC 2016.2 を使用して、すべてソフトウェアで実装したラプラシアンフィルタをコンパイルし、ZYBO 実機でテストした。今回は、ラプラシアンフィルタをハードウェアにして性能を確かめてみよう。なお、SDSoC 2015.2 の時の記事は”SDSoC 2015.2 でハードウェアとソフトウェアのラプラシアンフィルタの性能を比較した4(ハードウェア化)

project.sdsoc を開いて、Hardware Functions で Add Hardware Function の+記号をクリックする。
SDSoC_2016_2_18_161128.png

Select function for hardware acceleration ダイアログが開く。

lap_filter_axim(int *, int *, int, int) をクリックして、ハードウェア化する。
SDSoC_2016_2_19_161128.png

Hardware Functions に lap_filter_axim が入った。
SDSoC_2016_2_20_161128.png

トンカチの形のBuild ボタンをクリックしてビルドしたところ、エラーが発生した。
SDSoC_2016_2_21_161128.png

SDSoC 2015.2 でハードウェアとソフトウェアのラプラシアンフィルタの性能を比較した4(ハードウェア化)”と同様のエラーだった。
エラー内容を示す。

ERROR: [SDSoC 0-0] Function "lap_filter_axim" argument "cam_fb" is mapped to RAM interface, but it's size is bigger than 16384. Please specify #pragma SDS data zero_copy(cam_fb) or #pragma SDS data access_pattern(cam_fb:SEQUENTIAL)
ERROR: [SDSoC 0-0] Failed to generate interface tcl script: C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/vhls/lap_filter_axim.tcl
ERROR: [SDSoC 0-0] Exiting sdscc : Error when calling 'pragma_gen -func lap_filter_axim -tcl C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/vhls/lap_filter_axim.tcl C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/vhls/laplacian_filter2_pp.c -- -c -D __SDSVHLS__ -IC:/Users/Masaaki/workspace/lap_filter2/src -Wall -O0 -g -fmessage-length=0 -MMD -MP -D __SDSCC__ -I C:/HDL/Xilinx/SDSoC/2016.2/aarch32-linux/include -IC:/Users/Masaaki/workspace/lap_filter2/src -target arm-linux-gnueabihf -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -O0 -g -w -I C:/HDL/Xilinx/SDSoC/2016.2/aarch32-linux/include -I C:/HDL/Xilinx/SDSoC/2016.2/Vivado_HLS/2016.2/include -IC:/HDL/Xilinx/SDSoC/2016.2/SDK/2016.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/4.9.2/include -IC:/HDL/Xilinx/SDSoC/2016.2/SDK/2016.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/4.9.2/include-fixed -IC:/HDL/Xilinx/SDSoC/2016.2/SDK/2016.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include -IC:/HDL/Xilinx/SDSoC/2016.2/SDK/2016.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/libc/usr/include'
sdscc log file saved as C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/reports/sds_laplacian_filter2.log
ERROR: [SDSoC 0-0] Build failed

make: *** [src/laplacian_filter2.o] エラー 1


次に、 #pragma SDS data zero_copy(cam_fb) か #pragma SDS data access_pattern(cam_fb:SEQUENTIAL) をつけろと言われているので、付けることにした。使い方は、”SDSoC 環境ユーザー ガイド UG1027 (v2016.2) 2016 年 7 月 13 日”の22ページ、”コピーおよび共有メモリ セマンティクス”に書いてある。

lap_filter_axim() の前に次に示すようにpragma を付けた。

#pragma SDS data zero_copy(cam_fb[0:ALL_PIXEL_VALUE])
#pragma SDS data zero_copy(lap_fb[0:ALL_PIXEL_VALUE])
int lap_filter_axim(int cam_fb[ALL_PIXEL_VALUE], int lap_fb[ALL_PIXEL_VALUE], int width, int height)
{


SDSoC_2016_2_22_161128.png

セーブしてから、ビルドしたが、エラーだった。
SDSoC_2016_2_23_161128.png

エラー内容を示す。BRAMが足りないと言われている。

ERROR: [Place 30-640] Place Check : This design requires more RAMB36/FIFO cells than are available in the target device. This design requires 353 of such cell types but only 60 compatible sites are available in the target device. Please analyze your synthesis results and constraints to ensure the design is mapped to Xilinx primitives as expected. If so, please consider targeting a larger device.
INFO: [SDSoC 0-0] See C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/p0/ipi/vivado.log for the context of the Vivado message above.
ERROR: [Place 30-640] Place Check : This design requires more RAMB18 and RAMB36/FIFO cells than are available in the target device. This design requires 708 of such cell types but only 120 compatible sites are available in the target device. Please analyze your synthesis results and constraints to ensure the design is mapped to Xilinx primitives as expected. If so, please consider targeting a larger device.
INFO: [SDSoC 0-0] See C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/p0/ipi/vivado.log for the context of the Vivado message above.
ERROR: [Place 30-640] Place Check : This design requires more RAMB36E1 cells than are available in the target device. This design requires 353 of such cell types but only 60 compatible sites are available in the target device. Please analyze your synthesis results and constraints to ensure the design is mapped to Xilinx primitives as expected. If so, please consider targeting a larger device.
INFO: [SDSoC 0-0] See C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/p0/ipi/vivado.log for the context of the Vivado message above.
ERROR: [Place 30-99] Placer failed with error: 'Implementation Feasibility check failed, Please see the previously displayed individual error or warning messages for more details.'
INFO: [SDSoC 0-0] See C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/p0/ipi/vivado.log for the context of the Vivado message above.
ERROR: [Common 17-69] Command failed: Placer could not place all instances
INFO: [SDSoC 0-0] See C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/p0/ipi/vivado.log for the context of the Vivado message above.
ERROR: [SDSoC 0-0] Exiting system_linker: Error when calling 'C:/HDL/Xilinx/SDSoC/2016.2/Vivado/2016.2/bin/vivado -mode batch -source "C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/p0/ipi/top.impl.tcl"'
ERROR: [SDSoC 0-0] Exiting sds++ : Error when calling 'system_linker -cf-input C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/.llvm/apsys_0.xml -cf-output-dir _sds/p0 -ip-db C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/.cdb/xd_ip_db.xml -ip-repo C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/iprepo/repo -sds-pf C:/HDL/Xilinx/SDSoC/2016.2/platforms/zybo:linux -bitstream -bit-name lap_filter2.elf.bit -boot-files -mdev-no-swgen -mdev-no-xsd -sdsoc -sd-output-dir _sds/p0/sd_card -bit-binary -elf C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/swstubs/lap_filter2.elf'
sds++ log file saved as C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/reports/sds.log
ERROR: [SDSoC 0-0] Build failed

make: *** [lap_filter2.elf] エラー 1


#pragma SDS data zero_copy の代わりに、#pragma SDS data access_pattern(cam_fb:SEQUENTIAL) を付けてみた。

#pragma SDS data access_pattern(cam_fb:SEQUENTIAL)
#pragma SDS data access_pattern(lap_fb:SEQUENTIAL)
int lap_filter_axim(int cam_fb[ALL_PIXEL_VALUE], int lap_fb[ALL_PIXEL_VALUE], int width, int height)
{


セーブして、ビルドしてみたところ、5時間くらいかかってエラーになった。
SDSoC_2016_2_24_161130.png

エラー内容を示す。今度は、LUTなどが足りないとのことだった。

ERROR: [Place 30-640] Place Check : This design requires more F7 Muxes cells than are available in the target device. This design requires 204055 of such cell types but only 8800 compatible sites are available in the target device. Please analyze your synthesis results and constraints to ensure the design is mapped to Xilinx primitives as expected. If so, please consider targeting a larger device.
INFO: [SDSoC 0-0] See C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/p0/ipi/vivado.log for the context of the Vivado message above.
ERROR: [Place 30-640] Place Check : This design requires more F8 Muxes cells than are available in the target device. This design requires 11953 of such cell types but only 4400 compatible sites are available in the target device. Please analyze your synthesis results and constraints to ensure the design is mapped to Xilinx primitives as expected. If so, please consider targeting a larger device.
INFO: [SDSoC 0-0] See C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/p0/ipi/vivado.log for the context of the Vivado message above.
ERROR: [Place 30-640] Place Check : This design requires more Slice LUTs cells than are available in the target device. This design requires 573217 of such cell types but only 17600 compatible sites are available in the target device. Please analyze your synthesis results and constraints to ensure the design is mapped to Xilinx primitives as expected. If so, please consider targeting a larger device. Please set tcl parameter "drc.disableLUTOverUtilError" to 1 to change this error to warning.
INFO: [SDSoC 0-0] See C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/p0/ipi/vivado.log for the context of the Vivado message above.
ERROR: [Place 30-640] Place Check : This design requires more LUT as Logic cells than are available in the target device. This design requires 212504 of such cell types but only 17600 compatible sites are available in the target device. Please analyze your synthesis results and constraints to ensure the design is mapped to Xilinx primitives as expected. If so, please consider targeting a larger device. Please set tcl parameter "drc.disableLUTOverUtilError" to 1 to change this error to warning.
INFO: [SDSoC 0-0] See C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/p0/ipi/vivado.log for the context of the Vivado message above.
ERROR: [Place 30-640] Place Check : This design requires more LUT as Memory cells than are available in the target device. This design requires 360713 of such cell types but only 6000 compatible sites are available in the target device. Please analyze your synthesis results and constraints to ensure the design is mapped to Xilinx primitives as expected. If so, please consider targeting a larger device. Please set tcl parameter "drc.disableLUTOverUtilError" to 1 to change this error to warning.
INFO: [SDSoC 0-0] See C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/p0/ipi/vivado.log for the context of the Vivado message above.
ERROR: [Place 30-640] Place Check : This design requires more LUT as Distributed RAM cells than are available in the target device. This design requires 360452 of such cell types but only 6000 compatible sites are available in the target device. Please analyze your synthesis results and constraints to ensure the design is mapped to Xilinx primitives as expected. If so, please consider targeting a larger device. Please set tcl parameter "drc.disableLUTOverUtilError" to 1 to change this error to warning.
INFO: [SDSoC 0-0] See C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/p0/ipi/vivado.log for the context of the Vivado message above.
ERROR: [Place 30-640] Place Check : This design requires more LUT4 cells than are available in the target device. This design requires 106690 of such cell types but only 35200 compatible sites are available in the target device. Please analyze your synthesis results and constraints to ensure the design is mapped to Xilinx primitives as expected. If so, please consider targeting a larger device.
INFO: [SDSoC 0-0] See C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/p0/ipi/vivado.log for the context of the Vivado message above.
ERROR: [Place 30-640] Place Check : This design requires more LUT6 cells than are available in the target device. This design requires 144752 of such cell types but only 17600 compatible sites are available in the target device. Please analyze your synthesis results and constraints to ensure the design is mapped to Xilinx primitives as expected. If so, please consider targeting a larger device.
INFO: [SDSoC 0-0] See C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/p0/ipi/vivado.log for the context of the Vivado message above.
ERROR: [Place 30-640] Place Check : This design requires more MUXF7 cells than are available in the target device. This design requires 204055 of such cell types but only 8800 compatible sites are available in the target device. Please analyze your synthesis results and constraints to ensure the design is mapped to Xilinx primitives as expected. If so, please consider targeting a larger device.
INFO: [SDSoC 0-0] See C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/p0/ipi/vivado.log for the context of the Vivado message above.
ERROR: [Place 30-640] Place Check : This design requires more MUXF8 cells than are available in the target device. This design requires 11953 of such cell types but only 4400 compatible sites are available in the target device. Please analyze your synthesis results and constraints to ensure the design is mapped to Xilinx primitives as expected. If so, please consider targeting a larger device.
INFO: [SDSoC 0-0] See C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/p0/ipi/vivado.log for the context of the Vivado message above.
ERROR: [Place 30-640] Place Check : This design requires more RAMD64E cells than are available in the target device. This design requires 360048 of such cell types but only 6000 compatible sites are available in the target device. Please analyze your synthesis results and constraints to ensure the design is mapped to Xilinx primitives as expected. If so, please consider targeting a larger device.
INFO: [SDSoC 0-0] See C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/p0/ipi/vivado.log for the context of the Vivado message above.
ERROR: [Place 30-99] Placer failed with error: 'Implementation Feasibility check failed, Please see the previously displayed individual error or warning messages for more details.'
INFO: [SDSoC 0-0] See C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/p0/ipi/vivado.log for the context of the Vivado message above.
ERROR: [Common 17-69] Command failed: Placer could not place all instances
INFO: [SDSoC 0-0] See C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/p0/ipi/vivado.log for the context of the Vivado message above.
ERROR: [SDSoC 0-0] Exiting system_linker: Error when calling 'C:/HDL/Xilinx/SDSoC/2016.2/Vivado/2016.2/bin/vivado -mode batch -source "C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/p0/ipi/top.impl.tcl"'
ERROR: [SDSoC 0-0] Exiting sds++ : Error when calling 'system_linker -cf-input C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/.llvm/apsys_0.xml -cf-output-dir _sds/p0 -ip-db C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/.cdb/xd_ip_db.xml -ip-repo C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/iprepo/repo -sds-pf C:/HDL/Xilinx/SDSoC/2016.2/platforms/zybo:linux -bitstream -bit-name lap_filter2.elf.bit -boot-files -mdev-no-swgen -mdev-no-xsd -sdsoc -sd-output-dir _sds/p0/sd_card -bit-binary -elf C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/swstubs/lap_filter2.elf'
sds++ log file saved as C:/Users/Masaaki/workspace/lap_filter2/SDDebug/_sds/reports/sds.log
ERROR: [SDSoC 0-0] Build failed

make: *** [lap_filter2.elf] エラー 1

  1. 2016年11月29日 04:08 |
  2. SDSoC
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